This Ph.D. is the Cockrell Family Regents Chair Professor of Electrical and Computer Engineering and Director, Microelectronics Research Center,at a prominent U.S.university.  He is also the Director of the South West Academy of Nano electronics, one of three centers in the US to develop are placement for MOSFETs.  As a Member of the Technical Staff, Corporate Research, Development and Engineering of Texas Instruments Incorporated from 1983-1987, he worked on poly silicon transistors and dynamic random access trench memory cells used by Texas Instruments in the world's first 4Megabit DRAM, for which he was co-recipient of the Best Paper Award, IEEE International Solid State Circuits Conference, 1986. 

He has been Assistant Professor,Associate Professor, and University Professor.  He has over 800 archival refereed publications/talks, 7 books/chapters, and 26 U.S. patents.  He has supervised over 50 Ph.D. and 60 MS students.  He received the Engineering Foundation Advisory Council Halliburton Award, 1991, the Texas Atomic Energy Fellowship (1990-1997), Cullen Professorship (1997-2001) and the NSF Presidential Young Investigator Award in 1988.  His recent awards include Fellow AAAS (2007), the Hocott Research Award from UT Austin (2007), Fellow of APS (2006), Distinguished Alumnus Award, IIT (2005), Industrial R&D 100 Award (with Singh in 2004), ECS Callinan Award, 2003, IEEE Millennium Medal, 2000 and SRC Inventor Recognition Award, 2000.  He is a Fellow of IEEE, and was a Distinguished Lecturer for IEEE Electron Devices Society, and the General Chair of the IEEE Device Research Conference, 2002.  This expert witness is currently active in the areas of ultra high vacuum chemical vapor deposition for silicon-germanium-carbon heterostructure MOSFETs, nanoparticle flash memories and nanostructures.  He is also interested in the areas ofultra-shallow junction technology and semiconductor device modeling.  

Circuit and Process Development:

• DRAM, SRAM & Flash EEPROM 
• pMOS, nMOS & CMOS

Device Development:

• DRAM, SRAM & Flash/EEPROM Memory Cells
• Hot electron transport in small geometry devices and the physics of scaled devices
• New device and integrated circuit structures, including advanced component development and process modeling
• PNP and NPN transistors
• Polysilicon TFTs, Transistors/ resistors/capacitors/JFET in pMOS, nMOS, CMOS processes

Process Steps Development:

• Advanced crystal growth of silicon-germanium, strained silicon semiconductor materials
• Cleaning steps
• Device processing including ion implantation, rapid thermal processing, plasma etching, remote plasma, and thermal chemical vapor deposition of silicon-germanium-carbon and related films
• Etching, deposition and planarization process steps such as Chemical Mechanical Polishing (CMP)
• Gate and polysilicon oxidation steps
• Plasma and Trench etching and Filling steps
• Process flow design
• Wafer gettering methods