This expert witness has 23 years of experience as a chip designer and architect. His background ranges from microprocessor design to network systems, including Ethernet, SONET and ATM. Throughout his design career, he used a programming approach to chip design ( Hardware Description Languages ), including the period of the 1980s when the great majority of chip designers were using schematic capture.

He has in depth understanding of programming, from microcoding to web design. He has written a number of substantial Perl programs to automate chip design, and has been a leader in using innovative design tools such as Synthesis, Automatic Test Pattern Generation and Formal Verification.  He also provides litigation support consulting services

• ATM               
• ASIC Design and Architecture
• Converged Network Services
• Display System Design
• FPGA
• HDL ( Synopsys, Verilog, Verplex LEC, Primetime, Perl, Veritime, Mustang, VCS, Mentor ATPG Tools, Frame, Ambit Build Gates )
• IP
• Memory System Design
• SOC ASIC
• SONET
• VLSI

• B.S., Electronics, First Class Honors

Expert Witness Services;

• Code Comparison
• Deposition
• Expert Witness Reports
• Intellectual Property
• Patent Analysis
• Patent Litigation
• Patent Portfolio Review
• Pre-Litigation
• Prior Art Research
• Technical Consultant
• Trade Secret