Professional Summary: This Ph.D has over thirty years experience with memory and CPU design architecture. He has worked on numerous industry projects involving system architecture, processor design, and cache and memory subsystems.
He has consulted on product strategy, comparative technical analysis, and system-level design in the areas of DRAMs, Flash, SRAMs and other semiconductor memories, computer systems and CPU architecture, and uni- and multi-processor memory hierarchy design. Technical engagements have included serving as memory system architect for Flash and DRAM memory devices and systems. In addition, he offers: general business planning and analysis services to computer and semiconductor companies; intellectual property management, including portfolio evaluation, development and brokering, patent infringement and litigation support services to IP holders and legal firms; and due-diligence analyses to venture capitalists and securities firms.
He has written on a variety of topics for a broad spectrum of trade magazines and academic journals. As one of the leading independent analysts of the semiconductor memory industry, he wrote and substantially revised n 850-page research report. He also taught and presented tutorials to both technical and non-technical audiences on subjects including semiconductor memory architecture, memory hierarchy design, and computer systems and CPU architecture. In particular, he has presented over 50 full- and partial-day seminars on these topics to over 2,500 managers, engineers, marketers, and analysts. He has also served on the advisory boards of high-technology start-ups, advising on processor, DRAM and Flash memory trends and general business opportunities.
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